Table 4-1 contains a summary of ODT commands. The power-down sequence en- sures that proper shut-down procedures are followed during a power failure. Products Supported This manual supports the 8560 (SN B1 00000 and above), the 8561 (SNB1 00000 and above), and the 8562 Multi-User Software Development Units. When changing the mosaic size mid-frame, the hardware does first finish current block (using the old vertical size) before applying the new vertical size.
When the jumper is in the RS-232-C position, HSIO is not grounded and the I/O Processor selects one of six baud rates compatible with RS-232-C protocol. The register control logic described here controls the RCS and XCS Registers described later in this section. These signals are address bits 1 and 2 of the register ad- dress. U3120 generates four signals that select one of four registers for a particular port. The MSC Board plugs into connector J6 on the Main Inter- connect Board. The following sections are for technical people who want to understand the structure of a TIFF/CR2 file.
For additional information on baud rate selection, refer to Section 3 of this manual. The BDAL 18 Input to the holding register is grounded, and the BDAL 18 true Input inhibits the board address recogni- tion circuitry. The Processor <^ The heart of the lOP Board is an Intel 8088 microprocessor strapped for min mode and capable of addressing one megabytes of memory.